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johnmph
Joined: 23 Jul 2005
Posts: 119
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 Posted: Wed May 24, 2006 9:18 pm Post subject: load delay |
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Hello, i would like to know why this small code works :
| Code: |
.set noreorder
.global func
.ent func
func:
lw $a2, 0x0($a0)
sw $a2, 0x0($a1)
jr $ra
nop
.end func
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In the mips documentation, load in memory uses delay : "you *must* have an instruction following a load that does not use the result of the load".
However, this code uses the result of the load immediately after and he works.
Is what it is because the compiler arranges the code ? (even with .set noreorder directive ?) |
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ector
Joined: 12 May 2005
Posts: 195
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| Posted: Wed May 24, 2006 9:39 pm Post subject: |
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No modern MIPS CPU:s that I know of have this limitation. They all added forwarding, fixing this problem, in something like 1992. What documentation are you reading?
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http://www.dtek.chalmers.se/~tronic/PSPTexTool.zip Free texture converter for PSP with source. More to come. |
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BlackDiamond
Joined: 02 Jul 2005
Posts: 16
Location: Paris, FRANCE
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| Posted: Wed May 24, 2006 10:12 pm Post subject: |
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| Modern MIPS CPUs can (partially) stall the pipeline and wait for the result to be availiable. So no interlaced instruction is needed but the delay is still here. |
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groepaz
Joined: 01 Sep 2005
Posts: 305
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BlackDiamond
Joined: 02 Jul 2005
Posts: 16
Location: Paris, FRANCE
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| Posted: Thu May 25, 2006 12:36 am Post subject: |
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| yep, got rid of the 2 wasted cycles :) |
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johnmph
Joined: 23 Jul 2005
Posts: 119
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| Posted: Thu May 25, 2006 12:58 am Post subject: |
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Thanks all.
| groepaz wrote: | conclusion, make it
| Code: |
lw $a2, 0x0($a0)
jr $ra
sw $a2, 0x0($a1)
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:) |
yes, it's the code that i will use. |
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johnmph
Joined: 23 Jul 2005
Posts: 119
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| Posted: Sun May 28, 2006 10:01 pm Post subject: |
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one more question :
write in memory has also a delay like read ?
In documentation, it talks about load only.
Thanks |
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johnmph
Joined: 23 Jul 2005
Posts: 119
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| Posted: Mon May 29, 2006 5:58 am Post subject: |
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| johnmph wrote: | one more question :
write in memory has also a delay like read ?
In documentation, it talks about load only.
Thanks |
oups, stupid question.
Even if write has a delay, registers are not affected and even if i read memory just after having written this memory, load creates a delay, thus no problem ;-) |
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