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SKiTZo
Joined: 03 Dec 2004
Posts: 1
Location: Howell MI
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 Posted: Fri Dec 03, 2004 11:03 pm Post subject: I need helP! |
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Can anyone explain to me how I can do programming for a psOne? Is it exactly like the IOP? Thanxalot if you can explain this to me or point me to a good tut. Thanx,
SKiTZo
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Check this shit out!
SKiTZo |
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Raizor
Joined: 18 Jan 2004
Posts: 60
Location: out there
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teaeg
Joined: 12 Mar 2004
Posts: 5
Location: Denmark
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| Posted: Sat Dec 04, 2004 11:43 pm Post subject: |
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Try searching for the psx.pdf file in Google --- it's a good overview of the PS1 architecture.
Teaeg |
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J.F.
Joined: 22 Feb 2004
Posts: 2906
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| Posted: Sun Dec 05, 2004 7:25 am Post subject: |
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I imagine you are talking about this:
http://www.zophar.net/tech/files/psx.pdf
Zophar's site has a lot of good emulation information on it. If you can't find an emulator for something on Zophar's Domain, it doesn't exist. :)
The tech sections are pretty good too. Just about every non-proprietary doc out. |
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teaeg
Joined: 12 Mar 2004
Posts: 5
Location: Denmark
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| Posted: Mon Dec 06, 2004 12:45 am Post subject: |
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Yes, I was referring to this document. Another good reference is Toshiba TX39 related datasheets --- PS1 CPU and IOP are derivatives/modifications of TX39.
Fot me the differences between the PS1 CPU and the IOP are more interesting. For example,
the IOP does not have PS1 GPU unit. So, in the PS1 emulation mode there must be a hardware
mechanism to intercept the access to the GPU memory--mapped registers and to re-route them
to the emulation code running on the EE--GS pair. Similarly, I do not think that IOP has build--in
MDEC harwdare of PS1 --- in the emulation mode it also must be emulated by the EE.
I am not sure if anyone has looked carefully how this is done --- what IOP registers are allocated for enabling/disabling these features?
Teaeg |
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Guest
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| Posted: Mon Dec 06, 2004 2:02 am Post subject: |
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Actually, that is not correct. The PS1/IOP cpu are NOT derivatives of any Toshiba chip. LSI Logic did the CPU for the IOP and PS1.
However, any MIPS R3000(A) class CPU w/o FPU would be close enough, but won't include extensions such as the PS1's GTE coprocesser. So for the most part, the Tx39 datasheets would work.
Perhaps you were thinking of the EE, which was done by Toshiba, and for which the TX79 was a derivative, or vice versa. |
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Guest
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| Posted: Mon Dec 06, 2004 2:09 am Post subject: |
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| teaeg wrote: |
Fot me the differences between the PS1 CPU and the IOP are more interesting. For example,
the IOP does not have PS1 GPU unit. So, in the PS1 emulation mode there must be a hardware
mechanism to intercept the access to the GPU memory--mapped registers and to re-route them
to the emulation code running on the EE--GS pair. Similarly, I do not think that IOP has build--in
MDEC harwdare of PS1 --- in the emulation mode it also must be emulated by the EE.
Teaeg |
The IOP does have the MDEC. The IOP has pretty much everything the PS1 CPU had and alot more, but not including the GPU.
The PS1 GPU was a DMA device to receive lists of graphics primitives. In the PS2, these DMA channels are replace by the SIF DMA channels (with no perceived difference by the IOP) and the graphics processing is emulated by a software program running on the EE which converts the lists to a format understood by the GS. |
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teaeg
Joined: 12 Mar 2004
Posts: 5
Location: Denmark
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| Posted: Mon Dec 06, 2004 4:16 am Post subject: |
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Thanks for the explanations.
Teaeg |
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