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hlide
Joined: 10 Sep 2006
Posts: 750
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 Posted: Sat Oct 28, 2006 11:49 pm Post subject: VFPU - vbfy1.p/q, vbfy2.q : "butterfly" operation |
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Hi,
I made some test and found out that they are "butterfly" operations like in idct :
| Code: |
vbtf1.q/p vd, vs :
{
vd[i+0] = vs[i+0] + vs[i+1];
vd[i+1] = vs[i+0] - vs[i+1];
}
vbtf2.q vd, vs :
{
vd[0] = vs[0] + vs[2];
vd[1] = vs[1] + vs[3];
vd[2] = vs[0] - vs[2];
vd[3] = vs[1] - vs[3];
}
vbtf2.q vd, vs[0, 2, 1, 3] :
{
vd[0] = vs[0] + vs[1];
vd[1] = vs[2] + vs[3];
vd[2] = vs[0] - vs[1];
vd[3] = vs[2] - vs[3];
}
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Enjoy ! |
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Raphael
Joined: 17 Jan 2006
Posts: 646
Location: Germany
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hlide
Joined: 10 Sep 2006
Posts: 750
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| Posted: Sun Oct 29, 2006 8:09 am Post subject: |
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hi Raphael,
do you know what those vfpu conditions are ?
"FL" : ?
"EQ" : ==
"LT" : <
"LE" : <=
"TR" : ?
"NE" : !=
"GE" : >=
"GT" : >
"EZ" : == 0.0 ?
"EN" : == NaN ?
"EI" : == Inf ?
"ES" : same sign ?
"NZ" : != 0.0 ?
"NN" : != NaN ?
"NI" : != Inf ?
"NS" : not same sign ?
Do you know how to detect if a float has an overflow (without trap ?)
i'm trying to map GTE operations on VFPU operations and need to report overflow as GTE does. So I need to test if a float overflowed and set a specific bit in GTE FLAGS.
Yes I know GTE computes up to 44 bits precision but i want to try it using VFPU at all and see what happens.
I have mostly a working R3000AF dynamic recompiler without cop0 and cop2 (gte), so I'm trying to have a gte dynamic recompiler too.
Last edited by hlide on Sun Oct 29, 2006 10:28 am; edited 1 time in total |
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Insert_witty_name
Joined: 10 May 2006
Posts: 376
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| Posted: Sun Oct 29, 2006 9:51 am Post subject: |
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| You have GE and GT the wrong way around. |
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hlide
Joined: 10 Sep 2006
Posts: 750
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| Posted: Sun Oct 29, 2006 10:29 am Post subject: |
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| Insert_witty_name wrote: | | You have GE and GT the wrong way around. |
are you sure ? ;P |
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Insert_witty_name
Joined: 10 May 2006
Posts: 376
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| Posted: Sun Oct 29, 2006 10:09 pm Post subject: |
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| Damn the power of the edit button! |
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Raphael
Joined: 17 Jan 2006
Posts: 646
Location: Germany
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| Posted: Mon Oct 30, 2006 4:39 am Post subject: |
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I only can confirm the following:
"FL" : ?
"EQ" : ==
"LT" : <
"LE" : <=
"TR" : ?
"NE" : !=
"GE" : >=
"GT" : >
"EZ" : == 0.0
"EN" : == NaN
"EI" : == Inf
"NZ" : != 0.0
"NN" : != NaN
"NI" : != Inf
Regarding the other I can only guess:
"TR" : True?
"FL" : False?
| Quote: |
Do you know how to detect if a float has an overflow (without trap ?)
i'm trying to map GTE operations on VFPU operations and need to report overflow as GTE does. So I need to test if a float overflowed and set a specific bit in GTE FLAGS.
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Sorry, don't know that.
I'm still amazed about those butterfly functions, I never thought there could have been something like that. Those will be very handy for doing FFT for my audio analyzer and (i)DCTs (for ffmpeg and maybe even for madlib) with VFPU. Thanks again :)
_________________
<Don't push the river, it flows.>
http://wordpress.fx-world.org - my devblog
http://wiki.fx-world.org - VFPU documentation wiki
Alexander Berl |
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hlide
Joined: 10 Sep 2006
Posts: 750
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| Posted: Mon Oct 30, 2006 4:47 am Post subject: |
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| that's why I posted it ;) |
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Tinnus
Joined: 29 Jul 2006
Posts: 67
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| Posted: Tue Oct 31, 2006 1:13 am Post subject: |
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hlide, you could always check the overflows in software (ie: moving the results to the GPRs then checking by hand).
That would seem too slow at first, but you could try and hide some MIPS ops in the VFPU latency slots :)
_________________
Let's see what the PSP reserves... well, I'd say anything is better than Palm OS. |
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Raphael
Joined: 17 Jan 2006
Posts: 646
Location: Germany
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| Posted: Wed Nov 08, 2006 5:25 am Post subject: |
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Could it be that "ES" is "equal NAN or INF" (and NS the opposite), meaning the exponent bits are all ones? Can you verify that?
_________________
<Don't push the river, it flows.>
http://wordpress.fx-world.org - my devblog
http://wiki.fx-world.org - VFPU documentation wiki
Alexander Berl |
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hlide
Joined: 10 Sep 2006
Posts: 750
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| Posted: Wed Nov 08, 2006 10:08 am Post subject: |
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| Raphael wrote: | | Could it be that "ES" is "equal NAN or INF" (and NS the opposite), meaning the exponent bits are all ones? Can you verify that? |
well i found a better way to handle GTE flags with VFPU if i'm not wrong...
| Code: |
viim.s S011, 16384 # 1<<(26-12)
viim.s S010, 8192 # 1<<(25-12)
vadd.s S012, S011, S011 # 1<<(27-12)
viim.s S000, 8
vscl.t C000, C010, S000 # [1<<(30-12),1<<(29-12),1<<(28-12)]
lvi.t C020, [-MIN_MAC1, -MIN_MAC2, -MIN_MAC3] # gaaah lvi.t is unimplemented even it is present in opc-mips.c :(((
lvi.t C030, [+MAX_MAC1, +MAX_MAC2, +MAX_MAC3]
vslt.t C020, C130, C020 # cn[i] = MAC[i] < -MIN_MACi ? 1.0 : 0.0
vsge.t C030, C130, C030 # cp[i] = MAC[i] >= +MAX_MACi ? 1.0 : 0.0
vdot.t S100, C020, C000 # Ap = (cp[0] * 1<<(30-12-i)) + (cp[1] * 1<<(29-12-i)) + (cp[2] * 1<<(28-12-i))
vdot.t S133, C030, C010 # An = (cn[0] * 1<<(27-12-i)) + (cn[1] * 1<<(26-12-i)) + (cn[2] * 1<<(25-12-i))
vadd.s S133, S100, S133 # (FLAGS >> 12) = (An + Ap);
...
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too funny to use vdot.t to merge bits :)
to answer your question, i'm too busy :/ |
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