hlide
Joined: 10 Sep 2006
Posts: 750
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 Posted: Sun Mar 18, 2007 10:23 pm Post subject: psp-as : instructions addition |
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new mips-ops.c for binutils-2.16.1/opcodes : http://hlide.free.fr/download/PSP/mips-opc.c
Allegrex CPU core :
mfic bitmask16 : mfic zr, bitmask16
mfic bitmask16 : mfic zr, bitmask16
halt : CPU waits for an external event (intr mostly)
mfio rt, ioport : read ioport ? (mostly used by ME processor)
mtio rt, ioport : write ioport ? (mostly used by ME processor)
Allegrex VFPU core :
vc2i.s vd.q, vs.s : missing reverse instruction for vi2c.q vd.s, vs.q
vuc2i.s vd.q, vs.s : missing "half" reverse instruction for vi2uc.q vd.s, vs.q
TyRaNiD, if you can commit it for people wanting them so badly XD |
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